
2002 Microchip Technology Inc.
Preliminary
DS30453D-page 33
PIC16C5X
6.7
Indirect Data Addressing; INDF
and FSR Registers
The INDF Register is not a physical register.
Addressing INDF actually addresses the register
whose address is contained in the FSR Register (FSR
is a
pointer). This is indirect addressing.
EXAMPLE 6-1:
INDIRECT ADDRESSING
Register file 08 contains the value 10h
Register file 09 contains the value 0Ah
Load the value 08 into the FSR Register
A read of the INDF Register will return the value
of 10h
Increment the value of the FSR Register by one
(FSR = 09h)
A read of the INDF register now will return the
value of 0Ah.
Reading INDF itself indirectly (FSR = 0) will produce
00h. Writing to the INDF Register indirectly results in a
no-operation (although STATUS bits may be affected).
A simple program to clear RAM locations 10h-1Fh
EXAMPLE 6-2:
HOW TO CLEAR RAM
USING INDIRECT
ADDRESSING
MOVLW
H’10’
;initialize pointer
MOVWF
FSR
; to RAM
NEXT
CLRF
INDF
;clear INDF Register
INCF
FSR,F
;inc pointer
BTFSC
FSR,4
;all done?
GOTO
NEXT
;NO, clear next
CONTINUE
:
;YES, continue
The FSR is either a 5-bit (PIC16C54, PIC16CR54,
PIC16C55,
PIC16C56,
PIC16CR56)
or
7-bit
(PIC16C57, PIC16CR57, PIC16C58, PIC16CR58)
wide register. It is used in conjunction with the INDF
Register to indirectly address the data memory area.
The FSR<4:0> bits are used to select data memory
addresses 00h to 1Fh.
PIC16C54,
PIC16CR54,
PIC16C55,
PIC16C56,
PIC16CR56: These do not use banking. FSR<6:5> bits
are unimplemented and read as '1's.
PIC16C57,
PIC16CR57,
PIC16C58,
PIC16CR58:
FSR<6:5> are the bank select bits and are used to
select the bank to be addressed (00 = bank 0,
01
=bank 1, 10 = bank 2, 11 = bank 3).
FIGURE 6-10:
DIRECT/INDIRECT ADDRESSING
Note
bank
location select
bank select
Indirect Addressing
Direct Addressing
Data
Memory(1)
0Fh
10h
Bank 0
Bank 1
Bank 2
Bank 3
0
4
5
6
(FSR)
10
00
01
11
00h
1Fh
3Fh
5Fh
7Fh
(opcode)
0
4
5
6
(FSR)
Addresses map back to
addresses in Bank 0.
3
2
1
3
2
1